HV7360 features ? hvcmos ? technology for high performance ? high density integration ac coupled pulser ? 0 to 100v output voltage ? 2.5a source and sink minimum pulse current ? up to 35mhz operating frequency ? 2.0ns matched delay times ? 2.5, 3.3 or 5.0v cmos logic interface ? low power consumption and very simple to use application ? medical ultrasound imaging ? piezoelectric transducer drivers ? ndt ultrasound transmission ? pulse waveform generator general description the supertex HV7360 is a high voltage, high-speed, pulse generator with built-in, fast return to zero damping fets. this high voltage and high-speed integrated circuit is designed for portable medical ultrasound image devices, but can also can be used for ndt and test equipment applications. the HV7360 consists of a controller logic interface circuit, level translators, ac coupled mosfet gate drivers and high voltage and high current p-channel and n-channel mosfets as the output stage. the peak output currents of each channel are guaranteed to be over 2.5a with up to 100v of pulse swing. the ac coupling topology for the gate drivers not only saves two foating voltage supplies, it also makes the pcb layout easier. typical rtz application circuit high speed, 100v 2.5a, two or three level ultrasound pulser +2.5/3.3v v ll vddv h ina inb pe vl1 gnd inc ind vss sp1 sp2 sn1 sn2 dp1 dp2 v nn 0 to -100v +10v 2.5/3.3v logic input dn2 dn1 vl2 vl3 +10v hv out v pp 0 to +100v supertex inc. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com free datasheet http:///
2 HV7360 absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. pad confguration package marking 22-lead lfga (la) package may or may not include the following marks: si or 22-lead lfga (la) (top view) parameter value v dd C v ss logic supply voltage -0.5 to +12.5v v h output high supply voltage v l -0.5 to v dd +0.5v v l output low supply voltage v ss -0.5v to v h +0.5v v ss low side supply voltage -6.0 to +0.5v (v spx - v snx ) differential high voltage +220v v spx positive high voltage -0.5 to +110v v snx negative high voltage +0.5 to -110v all logic input voltages v ss -0.5v to gnd +5.5v coupling capacitor breakdown voltage 110v maximum junction temperature 125c operating temperature -20 to +85c pe input pulse output mosfets ina inb inc ind sp1 to dp1 dn1 to sn1 sp2 to dp2 dn2 to sn2 1 1 x x x on x x x x 1 x x x on x x x x 1 x x x on x x x x 1 x x x on 0 x x x off x x x x 0 x x x off x x x x 0 x x x off x x x x 0 x x x off 0 x x x x off off off off logic control table 9 8 7 6 5 4 3 2 1 a b c d e f g h j k l m n p -g indicates package is rohs compliant (green) ordering information part number package option packing HV7360la-g 22-lead lfga 364/tray power-up sequence step description 1 v ll 2 v dd , v h , v ss , v l with signal logic low 3 v pp and v nn 4 pe active power-down sequence step description 1 pe inactive 2 v pp and v nn off 3 v dd , v h , v ss , v l off 4 v ll off note: powering up/down in any arbitrary sequence will not cause any damage to the device. the powering up/down sequence is only recommended in order to minimize possible inrush current. HV7360 llllll yyww aaacc c l = lot number yy = year sealed ww = week sealed a = assembler id c = country of origin = ?green? packaging typical thermal resistance package ja 22-lead lfga 106 o c/w supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com free datasheet http:///
3 HV7360 operating supply voltages and current (operating conditions, unless otherwise specifed, gnd = 0v, v h = v dd = +10v, v l = v ss = 0v, v pe = 3.3v, v pp = +100v, v nn = -100v, t a = 25c) sym parameter min typ max unit conditions v dd C v ss supply voltage 4.75 - 11.50 v 4.0 v dd 11.5v v ss low side supply voltage -5.5 - 0 v --- v h output high supply voltage v ss +4.0 - v dd v v h - v l 4.0v v l output low supply voltage v ss - v dd -4.0 v i ddq v dd quiescent current - 50 - a no input transitions, pe = 0 i hq v h quiescent current - 2.0 - a i ddq v dd quiescent current - 1.0 - ma no input transitions, pe = 1 i hq v h quiescent current - 2.0 - a i dd v dd average current - 4.0 - ma one channel on at 5.0mhz, no load i h v h average current - 10 - ma v ih input logic voltage high v pe -0.3 - v pe v for logic inputs ina, inb, inc, and ind v il input logic voltage low 0 - 0.3 v i ih input logic current high - - 1.0 a i il input logic current low - - 1.0 a v peh pe input logic voltage high 1.70 3.30 5.25 v for logic input pe v pel pe input logic voltage low 0 - 0.3 v r inpe pe input impedance to gnd 100 - - k ac electrical characteristics (operating conditions, unless otherwise specifed, gnd = 0v, v h = v dd = +10v, v l = v ss = 0v, v pe = 3.3v, v pp = +100v, v nn = -100v, t a = 25c) sym parameter min typ max unit conditions t irf input or pe rise & fall time - - 10 ns logic input edge speed requirement t d1-4 input to output delay - 7.5 - ns r load = 1.0 t r/f1-2 output rise/fall time - 9.5 - ns c load = 330pf, r load = 2.5k t rf rise and fall time matching - 2.0 - ns channel to channel t dc2c propagation matching - 1.0 - t dd2d propagation delay matching - 2.0 - ns device to device delay match t pe-on pe on-time - - 5.0 s v pe = 1.7 ~ 5.25v v dd = 7.5 ~ 11.5v -20 ~ 85 o c t pe Coff pe off-time - - 4.0 c og output to mosfet gate cap - 10 - nf 100v x7s c vh v h to v l3 decoupling cap - 0.22 - f 16v x7r supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com free datasheet http:///
4 HV7360 pulser & damping p-channel mosfet sym parameter min typ max unit conditions bv dss drain-to-source breakdown voltage -200 - - v v gs = 0v, i d = -2.0ma v gs(th) gate threshold voltage -1.0 - -2.4 v v gs = v ds , i d = -1.0ma v gs(th) change in v gs(th) with temperature - - 4.5 mv/ o c v gs = v ds , i d = -1.0ma r gs gate-to-source shunt resistor 10 - 50 k i gs = 100a, if applied v zgs gate-to-source zener voltage 13.2 - 25 v i gs = -2.0ma, if applied i dss zero gate voltage drain current - - -10 a v ds = max rating, v gs = 0v - - -1.0 ma v ds = 0.8max rating, v gs = 0v, t a = 125 o c i d(on) on-state drain current -1.2 - - a v gs = -5.0v, v ds = -25v -2.3 -2.5 - v gs = -10v, v ds = -50v r ds(on) static drain-to-source on-state resistance - - 8.5 v gs = -5.0v, i d = -150ma - - 7.0 v gs = -10v, i d = -1.0a r ds(on) change in r ds(on) with temperature - - 1.0 %/ o c v gs = -10v, i d = -1.0ma g fs forward transconductance 400 - - mmho v ds = -25v, i d = -500ma c iss input capacitance - 75 - pf v gs = 0v, v ds = -25v, f = 1.0mhz c oss common source output capacitance - 21 - c rss reverse transfer capacitance - 6.5 - v sbd diode forward voltage drop and reverse recovery time of body-diode - - 1.8 v v gs = 0v, i sd = 500ma t rrbd - 300 - ns --- pulser & damping n-channel mosfet sym parameter min typ max unit conditions bv dss drain-to-source breakdown voltage 200 - - v v gs = 0v, i d = 2.0ma v gs(th) gate threshold voltage 1.0 - 2.4 v v gs = v ds , i d = 1.0ma v gs(th) change in v gs(th) with temperature - - -4.5 mv/ o c v gs = v ds , i d = 1.0ma r gs gate-to-source shunt resistor 10 - 50 k i gs = 100a v zgs gate-to-source zener voltage 13.2 - 25 v i gs = 2.0ma i dss zero gate voltage drain current - - 10 a v ds = max rating, v gs = 0v - - 1.0 ma v ds = 0.8max rating, v gs = 0v, t a = 125 o c i d(on) on-state drain current 1.3 - - a v gs = 5.0v, v ds = 25v 2.3 2.5 - v gs = 10v, v ds = 50v r ds(on) static drain-to-source on-state resistance - - 6.5 v gs = 5.0v, i d = 150ma - - 6.0 v gs = 10v, i d = 1.0a r ds(on) change in r ds(on) with temperature - - 1.0 %/ o c v gs = 10v, i d = 1.0a g fs forward transconductance 400 - - mmho v ds = 25v, i d = 500ma c iss input capacitance - 56 - pf v gs = 0v, v ds = 25v, f = 1.0mhz c oss common source output capacitance - 13 - c rss reverse transfer capacitance - 2.0 - v sbd diode forward voltage drop and reverse recovery time of body-diode - - 1.8 v v gs = 0v, i sd = 500ma t rrbd - 300 - ns --- supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com free datasheet http:///
5 HV7360 switch timing and delay test ina inb tx + dmp t f2 50% ina 0a i out +2.5/3.3v v ll vdd vh ina inb pe vl gnd inc ind vss sp1 sp2 sn1 sn2 dp1 dp2 -100v +10v 2.5/3.3v logic input dn2 dn1 vl3 +10v +100v tx + dmp t r1 t r2 t f1 t d1 t d3 t d2 t d4 50% 50% 50% 90% 90% 10% 10% i out inb 0a supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com free datasheet http:///
6 HV7360 typical unipolar 2-channel application circuit +2.5/3.3v v ll vddv h ina inb pe vl1 gnd inc ind vss sp1 sp2 sn1 sn2 dp1 dp2 v pp +10v 2.5/3.3v logic input dn2 dn1 vl2 vl3 +10v v pp = 0 to +100v tx2 tx1 pad description pad location name function a1 gnd driver and level translator circuit ground return (0v) a2 ind damping n-fet control signal logic input, controlling n-fet2 a3 inc damping p-fet control signal logic input, controlling p-fet2 a4 vss negative voltage power supply (0v) a6 vdd positive voltage supply (+10v), should connect to an external decoupling cap to vss (0v) a7 inb pulsing n-fet control signal logic input, controlling n-fet1 a8 ina pulsing p-fet control signal logic input, controlling p-fet1 a9 pe drive power enable hi = on, low = off , logic 1 voltage reference input (+1.8 to +3.3v) b2 vl2 gate-drive negative voltage power supply (0v) b8 vl1 gate-drive negative voltage power supply (0v) f4 vh gate driver positive voltage power supply (+10v) f7 vl3 vh to vl decoupling cap, should connect to vl1 & vl2 (0v) ground plane as short as possible g4 nc do not connect p1 sp2 source of p-fet2, positive high voltage power supply (0 to +100v) or gnd p2 dp2 drain of p-fet2, transmit pulser output p3 dn2 drain of n-fet2, transmit pulser output supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com free datasheet http:///
7 HV7360 pad description (cont.) pad location name function p4 sn2 source of n-fet2, negative high voltage power supply (0 to -100v) or gnd p5 nc do not connect p6 sp1 source of p-fet1, positive high voltage power supply (0 to +100v) p7 dp1 drain of p-fet1, transmit pulser output p8 dn1 drain of n-fet1, transmit pulser output p9 sn1 source of n-fet1, negative high voltage power supply (0 to -100v) pad confguration (top view) 9 8 7 6 5 4 3 2 1 a b c d e f g h j k l m n p 4.0mm 3.50mm 2.00mm 0.50mm 0.50mm 0.50mm 5.0mm 7.0mm supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com free datasheet http:///
8 HV7360 (the package drawing(s) in this data sheet may not refect the most current specifcations. for the latest package outline information go to http://www.supertex.com/packaging.html .) 22-lead lfga package outline (la) 5.00x7.00mm body, 0.85mm height (max), 0.50mm pitch symbol a b d e e e1 e2 e3 dimension (mm) min 0.75 0.20 4.925 6.925 0.50 bsc 2.00 bsc 3.50 bsc 4.00 bsc nom 0.80 0.25 5.000 7.000 max 0.85 0.30 5.075 7.075 drawings not to scale. supertex doc. #: dspd-22lfgala, version a052511. d t op vi ew bottom v iew e side v iew vi ew a a b b v iew a e e3 a b c d e f g h j k l m n p e1 e2 e e 9 8 7 6 5 4 3 2 1 note 1 (index area d1/4 x e1/4) notes: 1. a pin 1 identifer must be located in the index area indicated. the pin 1 identifer can be: a molded mark/identifer; an embedded metal marker; or a printed indicator. doc.# dsfp-HV7360 a040512 supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate ?product liability indemnification insurance agreement.? supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. (website: http//www .supertex.com) ?2012 supertex inc. all rights reserved. unauthorized use or reproduction is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com free datasheet http:///
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